The present invention relates to a method for producing a semiconductor wafer, in particular, a single crystal silicon wafer.
Conventional methods for producing semiconductor wafers generally comprise, as shown in Process III of FIG. 10 (henceforth this process is also referred to as xe2x80x9clapping/single side polishing methodxe2x80x9d), a slicing step to obtain a wafer of thin disc shape by slicing a single crystal silicon ingot pulled in a single crystal pulling apparatus; a chamfering step to chamfer a peripheral edge portion of the sliced wafer to prevent cracking or breakage of the wafer; a lapping step to flatten the surface of the chamfered wafer; a wet etching step to remove a mechanically damaged layer of the wafer remained after the chamfering and the lapping; a single side polishing step to finish one side of the etched wafer so that the wafer should have a mirror surface; and a cleaning step to clean the polished wafer to remove the polishing agent or dust particles remained on the wafer to improve the cleanliness of the wafer.
In view of recent use of semiconductors of higher functionality or higher performance, extremely smaller size, lighter weight and higher integration degree, higher quality and lower cost of base material wafers have been pursued. However, it is difficult to obtain flatness with high precision for wafers having, in particular, a large diameter of 200-300 mm or more, and reduction of production costs has almost reached its limitation.
Therefore, methods for processing wafers that can realize higher flatness and lower cost for the next generation have been actively developed. For example, there has been proposed a production method utilizing a combination of surface grinding and double side polishing (see Japanese Patent Laid-open Publication (Kokai) No. 9-260314).
This method makes it easy to obtain flatness and thickness with higher precision by utilizing a surface grinding step as shown in Process IV of FIG. 11 (henceforth this process is also referred to as xe2x80x9csurface grinding/double side polishing methodxe2x80x9d) instead of the lapping step of Process III. Moreover, since this method can easily be automated, it also makes possible to markedly reduce man-day or man-hour of workers. In addition, there has also been developed a method for simultaneously grinding both sides in order to eliminate undulation components of a long period of 0.5 to 30 mm, which are generated in cutting with a wire saw or an inner diameter slicer, and of which removal has hitherto constituted a developmental object.
Moreover, the double side polishing means also has an advantage that it affords flatness of higher precision compared with the conventional one side polishing.
In the second surface grinding step of the aforementioned Process IV, in general, the grinding processing is separately performed for the front surface and the back surface by using the same grinding stone or the same grinding conditions. The processing traces on the front surface and the back surface caused by the surface grinding are removed by performing double side polishing.
By the way, although double side polished wafers produced in Process IV having the aforementioned advantages are excellent in flatness and so forth, they have a history that they have not accepted by device manufacturers so far. As the reason for this, the following three reasons can be mentioned.
First, when the presence of a wafer was confirmed by sensing the back surface of the wafer during the device production process, if characteristics of the back surface of the wafer such as glossiness and surface roughness are changed from those of conventional ones, sensing sensitivity must be readjusted. Such readjustment for sensing must be performed for the whole long process consisting of several tens of steps. Therefore, alteration of back surface characteristics shall be accompanied by serious obstructions.
Secondly, the back surface of the wafer subjected to the double side polishing so that it should have a mirror surface suffers high contact area ratio during back surface chucking, handling and so forth. Therefore, it is likely to receive contamination from a transportation system and so forth, and hence considerable improvement of cleanliness degree is required for the transportation system, and it constitutes a new technical problem. Moreover, it is also pointed out that sliding of wafer occurs in transportation and alignment because the back surface is made into a mirror surface.
Thirdly, it has also found that change of substantial surface area or contact area of the wafer back surface may cause serious phenomena, for example, temperature control may be deviated in the dry etching step, ion implantation step and so forth. In order to minimize the change of process steps for device production, characteristics required for wafers must be comparable to those of back surfaces of conventional wafers produced by Process III (lapping/single side polishing method). Specifically, the back surface glossiness must be within the range of 20-80% so that the back surface and the front surface can easily be distinguished.
Furthermore, even if the double side polishing of Process IV (see FIG. 11) is replaced with single side polishing, that is, even if a non-mirror surface subjected to etching treatment after grinding is left on the wafer back surface, glossiness of the back surface would exceed 80%, when the back surface is ground by using the same grinding stone or the same grinding conditions as the surface grinding, in which the ground surface is intended to be removed by polishing. Thus, the same problems as a mirror surface may be caused. This is exactly because the surface grinding conditions are constituted by selection of grinding stone and grinding conditions optimized so that the surface can easily be made into a mirror surface in the subsequent polishing step.
The present invention was accomplished in view of the problems of the conventional techniques mentioned above, and its major object is to provide a method for producing a semiconductor wafer that has high flatness and back surface characteristics that can solve the problems concerning the back surface of a wafer having high glossiness for both sides that is produced by the conventional surface grinding/double side polishing method and observed during the device production process, and to provide a semiconductor wafer having such characteristics.
In order to achieve the aforementioned object, the present invention provides a semiconductor wafer obtained by a process comprising at least flattening both sides of the wafer by surface grinding means, eliminating a mechanically damaged layer by an etching treatment; and then subjecting the wafer to a single side polishing treatment, wherein a back surface of the wafer has glossiness in a range of 20-80%.
This wafer is a wafer that has excellent flatness for the both sides and different surface conditions for the front surface and the back surface. For example, the front surface is finished as a mirror surface having a glossiness of 90-100%, and the back surface is finished to have a glossiness of 20-80%. Such a wafer surely eliminates the obstructions observed for wafers produced by the conventional surface grinding/double side polishing method during the device production process, for example, need of readjustment of sensing sensitivity, indistinguishability of front surface and back surface, separation failure after vacuum sucking, contamination during transportation, bad temperature control and so forth. Therefore, it can improve productivity and yield and markedly reduce the cost of the device production process.
The present invention also provides a method for producing a semiconductor wafer, which comprises at least cutting out a wafer by slicing a semiconductor ingot, simultaneously grinding both of front surface and back surface of the wafer, then flattening the wafer by surface grinding means for separately grinding the front surface and the back surface under different conditions, removing a mechanically damaged layer by an etching treatment while maintaining flatness, and then subjecting the wafer to a single side polishing treatment.
By such a process for producing a wafer comprising simultaneous surface grinding of both sides, separate surface grinding for each of front surface and back surface, etching and single side polishing, a wafer having higher flatness can be produced with a lower cost compared with the conventional lapping/single side polishing method. Further, a back surface with desired low glossiness can easily be provided at low cost, in contrast to the drawback of the double side polished wafers, i.e., the high glossiness of the back surface.
Therefore, a wafer processed by the method of the present invention is a wafer having excellent flatness for the both sides, and different roughness conditions for the front surface and the back surface. For example, it can be finished to have a mirror surface of high glossiness for the front surface and desired low glossiness for the back surface. Such a wafer eliminates the obstructions in the device production process caused by wafers produced through the conventional surface grinding/double side polishing method, for example, need of readjustment of sensing sensitivity, indistinguishability of front surface and back surface, bad separation after vacuum sucking, contamination during transportation, bad temperature control and so forth. Therefore, productivity, yield and cost of the device production process can markedly improved.
The present invention further provides a method for producing a semiconductor wafer, which comprises at least cutting out a wafer by slicing a semiconductor ingot, simultaneously grinding both of front surface and back surface of the wafer, then flattening the surface by surface grinding means for grinding only the front surface under a condition different from the condition for the simultaneous grinding of both of the front surface and the back surface, removing a mechanically damaged layer by an etching treatment while maintaining flatness, and then subjecting the wafer to a single side polishing treatment.
Since low glossiness of the back surface is attained also by this method, a wafer with high flatness can easily be produced at low cost without significantly altering quality of the back surface compared with those of conventional wafers. Therefore, the various obstructions in the device production process can be overcome, and productivity, yield and cost of devices can markedly be improved.
In this case, as the grinding means, there can be used a double head grinding apparatus which can simultaneously grind both of the front surface and the back surface of the wafer, and a surface grinding apparatus which can grind the front surface and the back surface of the wafer with distinct conditions.
By using such a double-step grinding process, i.e., first simultaneously grinding both of the front surface and the back surface by a double head grinding apparatus to obtain high flatness for the both sides, and then grinding the front surface and the back surface with distinct conditions to give difference of surface roughness for the front surface and back surface, the wafer can be finished by the subsequent etching and polishing treatments so as to have a highly glossy front surface and a back surface of low glossiness.
In this case, the wafer is preferably subjected to chamfering before the surface grinding of the both sides.
By chamfering as described above, cracking and fractures such as chips of wafers during the grinding and polishing can be prevented.
Further, the etching treatment of the aforementioned method is preferably performed as wet etching using an alkali solution as an etching solution.
In the manner described above, the mechanically damaged layer of the wafer can be removed, while high flatness obtained by the double side surface grinding and the single side surface grinding is maintained, and the polishing can efficiently be performed in the subsequent single side polishing treatment while the quality obtained after the grinding is maintained. The etching treatment of the wafer can be performed in such a degree that a minimum stock removal for only the mechanically damaged layer should be removed.
As described above, a semiconductor wafer which has a front surface exhibiting high flatness and high glossiness and a back surface exhibiting glossiness within the range of 20-80% can easily be produced at low cost according to the present invention. Therefore, because a wafer produced according to the present invention has the back surface characteristics substantially comparable to those of a wafer obtained by the conventional lapping/single side polishing method, it eliminates the need for readjustment of sensor sensitivity for sensing the presence or absence of the wafer, enables clear differentiation between the front surface and the back surface of wafer and surer temperature control, and reduces contamination of the back surface caused by the transportation system. Thus, it can sufficiently meet to the requirements for realizing higher integration degree in the device production process, and it can improve productivity and yield of the device production process, and markedly improve the cost.